1. Field of the Invention
The present invention is directed to methods and systems for sensing and compensating for process, voltage, and/or temperature (“PVT”) variations in integrated circuits (“ICs”) and loads and, more particularly, for sensing and compensating for PVT variations in IC's that are impedance matched to loads.
2. Related Art
Integrated circuits (“ICs”) need to interface with widely varying loads, such as 40 ohm to 100 ohm transmission lines. In order to reduce voltage waveform reflections and consequent loss of signal integrity, output impedances of ICs should match load impedances.
IC characteristics and load characteristics can vary due to process (e.g., manufacturing process), voltage, and/or temperature (“PVT”) variations. ICs that are fabricated with narrower track widths tend to be more susceptible to PVT variations. PVT variations adversely affect circuit characteristics, such as impedances and rise and fall times of waveforms.
What are needed are methods and systems for maintaining circuit and/or signal characteristics, such as impedance matching characteristics and rise and fall time characteristics, over a range of PVT variations.